Breakthrough In Chip Technology: World’s Smallest Chip Ever Created

It's a 5nm silicon chip that has the potential to double or triple battery life.

Chip Technology

Moore’s Law says that as technology advances, the number of transistors that can be fitted on a given integrated circuit will keep shrinking every 18 months, which means exponential computer processing power growth. Although this trend has been going on for decades, it seems that we have just about reached the physical limitations of shrinking transistors down any further. As a result, there’s currently a growing consensus that Moore’s Law may be dead. While that may be true, however, it doesn’t necessarily mean that engineers and researchers should stop trying to make conventional transistors even smaller.

And that is exactly what IBM has been doing.

According to a report that recently came out, the Big Blue, together with Research Alliance partners GlobalFoundries and Samsung have developed a breakthrough process that will enable the building of 5 nanometer-sized (nm) chips — equivalent to the size of a human fingernail — capable of packing 30 billion switches. This news comes less than two years after IBM developed a 7nm chip (due for commercial release in 2019) that could fit 20 billion transistors.

More transistors packed closely means faster signal transmission. And with such increased density, IBM says that compared with current 10nm chips, their 5nm chip can achieve a 40% improvement on performance at fixed power, or 75% power efficiency at the same level of performance.

In contrast with the current-generation FinFET transistor design that sends signals through three gates, IBM says they’re using a new kind of transistor called stacked silicon nanosheets which sends signals through four gates.

FinFET is short for Fin Field-Effect Transistor and it’s what’s being used in 22nm, 14nm and 7nm chips. As efficient as its architecture is, though, the transistor can’t be scaled anymore as it is limited by the height of its fins. This means that even if the space between fins is reduced, it will not increase the flow of current, which is what is needed for enhanced performance.

This is where the strength of IBM’s stacked silicon nanosheet structure lies. Apparently, their nanosheet transistors can make use of Extreme Ultraviolet (EUV) lithography to continuously adjust the width of the nanosheets within a single manufacturing process or one chip design. This ‘adjustability’ is what enables the transistor’s power and performance to be ‘fine-tuned’ for individual circuits, something that can’t be done with FinFET chips.

This improved performance could pave the way for advances in data-intensive applications delivered via the cloud including cognitive computing and the Internet of Things (IoT). On the other hand, improved power efficiency could mean more powerful batteries, lasting twice or three times longer than those being used in present-day devices.

As explained by the director of IBM Research, Arvind Krishna: “For business and society to meet the demands of cognitive and cloud computing in the coming years, advancement in semiconductor technology is essential. That’s why IBM aggressively pursues new and different architectures and materials that push the limits of this industry, and brings them to market in technologies like mainframes and our cognitive systems.”

It might take a few more years before this newly developed chip can be put to commercial use. But it’s comforting to know that even with the death of Moore’s Law, the world won’t be lacking in innovation and innovators who will continue to push technology forward.

Be the first to comment

Leave a Reply

Your email address will not be published.


*